Optimization of a Two-Level Field-Plate Termination Structure
for Integrated-Power Applications in Ionizing Radiation Environments
- Steven L. Kosier
Vicepresident of Engineering
Technology Development
PolarFab, Inc.
2800, E. Old Shakopee Rd.
Bloomington, Minnesota 55425-1350
U.S.A.
Email:
KosierS@PolarFab.Com
- Dragan Zupac
Digital DNA Laboratory
Semiconductor Product Sector
Motorola, Inc.
2200, W. Broadway Road
Mesa, Arizona 85202-1094
U.S.A.
Email: Dragan.Zupac@Motorola.Com
-
Ronald D. Schrimpf
Department of Electrical Engineering and Computer Science
Vanderbilt University
Box 1608, Station B
Nashville, Tennessee 37235
U.S.A.
Email:
Ron.Schrimpf@Vanderbilt.Edu
-
François E. Cellier
Institute of Computational Science
ETH Zürich
CH-8092 Zürich
Switzerland
Email:
FCellier@Inf.ETHZ.CH
-
Kenneth F. Galloway
School of Engineering
Vanderbilt University
VU Station B 351826
Nashville, Tennessee 37235-1826
U.S.A.
Email:
Kenneth.F.Galloway@Vanderbilt.Edu
- Mohamed N. Darwish
Siliconix, Inc.
Santa Clara, California 95056
U.S.A.
- C. A. Goodwin
AT&T Bell Laboratories
2525, N. 12th Street
Reading, Pennsylvania 19612-3566
U.S.A.
- M. C. Dolly
AT&T Bell Laboratories
Reading, Pennsylvania 19612-3566
U.S.A.
Abstract
Analysis of four two-level field plate (FP) termination structures for
power-integrated circuit applications in ionizing radiation environments has
been performed through two-dimensional simulation and experiment. Breakdown
voltage degradation as a function of the distance the upper plate overlaps the
lower plate was obtained. Optimization of the upper plate overlap with respect
to device area and radiation hardness was accomplished.
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Last modified: January 19, 2006 -- © François Cellier